Electronic Communication System (4th Edition) by Kennedy & Davis.pdf src/public/js/zxcvbn.js This package implements a content management system with security features by default. Generator and intertie protection relays (824 pages), Protection and automation system (476 pages), Breaker failure relay and monitor (240 pages), Distribution relay; phase overcurrent relay with voltage control; negative-sequence overcurrent relay; ground overcurrent relay; multiple shot reclosing relay; selectable setting groups circuit breaker monitor; fault locator selogic control equations (208 pages), Phase and ground distance relay; directional overcurrent relay; fault locator (360 pages), Phase and ground distance relay; directional overcurrent relay; fault locator (354 pages), Phase and ground directional overcurrent relay with recloser and fault locator (123 pages), Phase and ground distance relay; ground directional overcurrent relay; synchronism checking relay; reclosing relay; fault locator (231 pages), Distribution relay; phase overcurrent relay; ground overcurrent relay; multiple shot reclosing relay; selectable setting groups; circuit breaker monitor; fault locator; selogic control equations (204 pages), Breaker failure relay; control relay; data recorder (444 pages), High-impedance differential relay (276 pages), Phase and ground distance relay; directional overcurrent relay; fault locator (396 pages), Current differential overcurrent relay data recorder (568 pages), Manual will be automatically added to "My Manuals", Schweitzer Engineering Laboratories Manuals, Relays Schweitzer Engineering Laboratories SEL-787 Instruction Manual, Relays Schweitzer Engineering Laboratories SEL-700G Series Instruction Manual, Relays Schweitzer Engineering Laboratories SEL-701 Instruction Manual, Relays Schweitzer Engineering Laboratories SEL-311A Instruction Manual, Relays Schweitzer Engineering Laboratories SEL-2BFR Instruction Manual, Relays Schweitzer Engineering Laboratories SEL-501-2 Instruction Manual, Relays Schweitzer Engineering Laboratories SEL-251 Instruction Manual, Relays Schweitzer Engineering Laboratories SEL-321-5 Instruction Manual, Relays Schweitzer Engineering Laboratories SEL-321-2 Instruction Manual, Relays Schweitzer Engineering Laboratories SEL-267D Instruction Manual, Relays Schweitzer Engineering Laboratories SEL-221F Instruction Manual, Relays Schweitzer Engineering Laboratories SEL-251-1 Instruction Manual, Relays Schweitzer Engineering Laboratories SEL-352-1 Instruction Manual, Relays Schweitzer Engineering Laboratories SEL-587Z Instruction Manual, Relays Schweitzer Engineering Laboratories SEL-321 Instruction Manual, Relays Schweitzer Engineering Laboratories SEL-387-0 Instruction Manual, Page 38: Table 1.2 Current (Aci) And Voltage (Avi) Card Selection For Sel-751 Models, Page 40: Table 1.4 Sel-751 Front-Panel Options, Page 41: Models, Options, And Accessories, Page 44: Figure 1.1 Sel-751 Feeder Protection Relay Applied Throughout The Power System, Page 45: Figure 1.2 Typical Current Connections, Page 46: Table 1.5 Sel-751 Serial Port Settings, Page 47: Figure 1.4 Sta Command Response-No Communications Card Or, Page 58: Figure 2.1 Relay Panel-Mount Dimensions, Page 59: Figure 2.2 Slot Allocations For Different Cards, Page 60: Table 2.1 Power Supply Inputs (Psio/2 Di/3 Do) Card Terminal Designations, Page 62: Table 2.3 Communications Card Interfaces And Connectors, Page 63: Table 2.4 Current/Voltage Inputs (4 Aci/3 Avi) Card Terminal Designations, Page 64: Table 2.6 Voltage/Arc-Flash Detection Inputs (2 Avi/4 Afdi) Card Terminal Designations, Page 65: Table 2.8 Eight Analog Inputs (8 Ai) Card Terminal Designations, Page 66: Table 2.10 I/O (3 Di/4 Do/1 Ao) Card Terminal Designations, Page 67: Table 2.12 Four Digital Inputs, One Form B Digital Output, Two Form C Digital Outputs (4 Di/3 Do) Card Terminal Designations, Page 68: Table 2.14 Eight Digital Inputs (8 Di) Card Terminal Designations, Page 69: Table 2.16 Fourteen Digital Inputs (14 Di) Card Terminal Designations, Page 73: Figure 2.3 Circuit Board Of Analog I/O Board, Showing Jumper Selection, Page 74: Table 2.17 Jumper Functions And Default Positions, Page 75: Figure 2.8 Dual Fiber Ethernet With 2 Avi/4 Afdi Voltage Option With Arc-Flash Detector Inputs, Devicenet Card, And Fast Hybrid 4 Di/4 Do Card (Relay Mot 751501Aa3Ca70850830), Page 76: Figure 2.9 Single Copper Ethernet, Eia-485 Communication, 8 Do (Form A) Card, Page 77: Figure 2.11 No Ethernet, Eia-232 Serial Communications, Eia-232/Eia-485 Communications Card, 8 Di Card, And 8 Do Card (Form A) (Relay Mot 751401Aa03A2A850000), Page 78: Figure 2.13 Dual Copper Ethernet, 14 Di Card, 8 Do (Form B) Card, 2 Avi/4 Afdi Card, Page 81: Figure 2.15 Control I/O Connections-4 Ai/4 Ao Option In Slot D And Fiber-Optic Port In Slot B, Page 82: Table 2.18 Typical Maximum Rtd Lead Length, Page 83: Figure 2.19 Out103 Contact Fail-Safe And Nonfail-Safe Options, Page 84: Figure 2.20 Single-Phase Voltage Connections, Page 87: Figure 2.22 Typical Current Connections, Page 88: Figure 2.23 Sel-751 Provides Overcurrent Protection And Reclosing For A Distribution Feeder (Includes Fast Bus Trip Scheme) (Delta-Connected Pts), Page 89: Figure 2.24 Sel-751 Provides Overcurrent Protection For A Distribution Bus (Includes Fast Bus Trip Scheme) (Wye-Connected Pts), Page 90: Figure 2.25 Transmission Line Directional Overcurrent Protection And Reclosing With Current-Polarization Source Connected To Channel In (Wye-Connected Pts), Page 91: Figure 2.26 Sel-751 Provides Overcurrent Protection For A Delta-Wye Transformer Bank (Wye-Connected Pts), Page 92: Figure 2.27 Sel-751 Provides Overcurrent Protection For A Transformer Bank With A Tertiary Winding (Wye-Connected Pts), Page 93: Figure 2.28 Sel-751 Provides Overcurrent Protection For An Industrial Distribution Feeder (Core-Balance Current Transformer Connected To Channel In), Page 94: Figure 2.29 Sel-751 Provides Overcurrent Protection For A High-Impedance Or Low-Impedance Grounded System (Wye-Connected Pts), Page 95: Figure 2.30 Sel-751 Provides Overcurrent Protection For A Petersen Coil-Grounded System (Wye-Connected Pts), Page 96: Figure 2.31 Sel-751 Provides Overcurrent Protection For An Ungrounded System (Wye-Connected Pts), Page 97: Figure 2.32 Sel-751 Provides Overcurrent Protection For An Ungrounded System (Open-Delta Connected Pts, Broken-Delta 3V0 Connection), Page 98: Figure 2.33 Sel-751 With A 2 Avi/4 Afdi Option Card And The Fiber-Optic-Based Point-Sensor, Page 99: Figure 2.34 Black-Jacketed Fiber Installation Example, Page 100: Figure 2.37 Point-Sensor Directivity (0-360° Around The Mounting Plane), Page 101: Figure 2.40 Clear-Jacketed Fiber Sensor Assembly, Page 102: Figure 2.41 Clear-Jacketed Fiber Sensor Mounting Example, Page 103: Figure 2.44 Switchgear Application Example, Page 104: Table 2.19 Optical Budget Calculations, Page 105: Figure 2.47 Bare-Fiber Sensor Assembly With Two Additional St Splice Connectors, Page 106: Figure 2.48 Point Sensor Assembly With Two V-Pin Splice Connectors, Page 109: Table 3.1 Sel Software Solutions, Page 110: Table 3.2 Ac Sel Erator Quickset Sel-5030 Software, Page 111: Figure 3.3 Network Communication Parameters Dialog Box, Page 112: Figure 3.5 Device Response To The Id Command, Page 118: Figure 3.9 Expressions Created With Expression Builder, Page 119: Figure 3.10 Composite Screens For Retrieving Events, Page 120: Figure 3.11 Saving The Retrieved Event, Page 121: Figure 3.12 Device Overview Screen, Page 123: Figure 3.14 Remote Operation Selection, Page 124: Figure 3.16 Spanish Settings Quickset Display, Page 125: Figure 3.17 Spanish Control Window (Ventana De Control) Display, Page 130: Table 4.2 Ct Configuration Settings, Page 131: Table 4.4 Effect On Group Settings When Singlev := Y, Page 133: Table 4.5 Main Relay Functions That Change With Vnom := Off, Page 136: Table 4.6 Line Parameter Settings, Page 137: Table 4.7 Fault Locator Setting, Page 138: Table 4.8 Maximum Phase Overcurrent Settings, Page 139: Table 4.9 Neutral Overcurrent Settings, Page 140: Figure 4.2 Instantaneous Overcurrent Element Logic, Page 141: Table 4.10 Residual Overcurrent Settings, Page 142: Figure 4.3 Instantaneous Overcurrent Element Pickup Time Curve, Page 143: Table 4.12 A-, B-, And C-Phase Time-Overcurrent Settings, Page 144: Table 4.13 Maximum Phase Time-Overcurrent, Page 145: Table 4.14 Negative-Sequence Time-Overcurrent Settings, Page 146: Table 4.15 Neutral Time-Overcurrent Settings, Page 147: Table 4.16 Residual Time-Overcurrent Settings, Page 148: Figure 4.9 Residual Time-Overcurrent Elements 51G1T And 51G2T, Page 149: Table 4.17 Equations Associated With U.s. Curves, Page 150: Figure 4.10 U.s. ALL RIGHTS RESERVED, Take A Sneak Peak At The Movies Coming Out This Week (8/12), #BanPaparazzi – Hollywood.com will not post paparazzi photos, 8 life lessons from the movie Fargo, 25 years later, Hollywood women are up for the challenge. Das Programm zum weltweiten Versand (USA) und das Programm zum weltweiten Versand (UK) (im weiteren Verlauf zusammen als das „GSP“ bezeichnet) machen bestimmte Artikel („GSP-Artikel“) aus den USA und dem Vereinigten Königreich für Käufer auf der ganzen Welt verfügbar. READ PAPER. Trang tin tức online với nhiều tin mới nổi bật, tổng hợp tin tức 24 giờ qua, tin tức thời sự quan trọng và những tin thế giới mới nhất trong ngày mà bạn cần biết Take A Sneak Peak At The Movies Coming Out This Week (8/12) #BanPaparazzi – Hollywood.com will not post paparazzi photos When the "Execute p1" button is clicked the javascript function p1 is executed. (7200 V). 1. Moderately Inverse Curve: U1, Page 151: Figure 4.14 U.s. Short-Time Inverse Curve: U5, Page 152: Figure 4.18 Iec Long-Time Inverse Curve: C4, Page 154: Table 4.19 Available Ground Directional Elements, Page 155: Table 4.20 Best Choice Ground Directional Element Logic, Page 156: Table 4.21 Ground Directional Element Availability By Voltage Connection Settings, Page 158: Figure 4.22 Logic For Relay Word Bit Gndsw, Page 162: Figure 4.23 Internal Enables (Dirqe And Dirqge) Logic For Negative-Sequence Voltage-Polarized Directional Elements, Page 163: Figure 4.24 Internal Enables (Dirve And Dirie) Logic For Zero-Sequence Voltage-Polarized And Channel In Current-Polarized Directional Elements, Page 164: Figure 4.25 Internal Enable (Dirne) Logic For Zero-Sequence Voltage-Polarized Directional Elements (Low-Impedance Grounded, Petersen Coil-Grounded, And Ungrounded/High-Impedance Grounded Systems), Page 165: Figure 4.26 Negative-Sequence Voltage-Polarized Directional Element For Neutral Ground And Residual Ground Overcurrent Elements, Page 166: Figure 4.27 Zero-Sequence Voltage-Polarized Directional Element, Page 167: Figure 4.28 Channel In Current-Polarized Directional Element, Page 168: Figure 4.29 Zero-Sequence Voltage-Polarized Directional Element (Low-Impedance Grounded Systems), Page 169: Figure 4.30 Wattmetric And Incremental Conductance Directional Elements (Petersen Coil-Grounded Systems), Page 170: Figure 4.31 Zero-Sequence Voltage-Polarized Directional Element (Ungrounded/High-Impedance Grounded Systems), Page 171: Figure 4.32 Routing Of Directional Elements To Residual Ground Overcurrent Elements, Page 172: Figure 4.34 Direction Forward/Reverse Logic For Residual Ground Overcurrent Elements, Page 173: Figure 4.35 Direction Forward/Reverse Logic For Neutral Ground Overcurrent Elements, Page 174: Figure 4.36 General Logic Flow Of Directional Control For Negative-Sequence And Phase Overcurrent Elements, Page 176: Figure 4.37 Negative-Sequence Voltage-Polarized Directional Element For Negative-Sequence And Phase Overcurrent Elements, Page 177: Figure 4.38 Positive-Sequence Voltage-Polarized Directional Element For Phase Overcurrent Elements, Page 178: Figure 4.39 Routing Of Directional Elements To Negative-Sequence And Phase Overcurrent Elements, Page 179: Table 4.22 Directional Control Settings, Page 182: Table 4.24 Directional Control Settings Not Made For Particular Conditions, Page 187: Figure 4.42 Traditional Channel In Current-Polarized Directional Element, Page 188: Figure 4.43 Current-Polarized Directional Element Characteristic When Inmta  0.00, Page 190: Figure 4.44 Zero-Sequence Impedance Network And Relay Polarity, Page 191: Figure 4.46 Low-Impedance Grounded Distribution System With A Ground Fault On Feeder, Page 192: Figure 4.47 Zero-Sequence Impedance Network For Low-Impedance Grounded Distribution System With A Ground Fault On Feeder, Page 194: Figure 4.50 Zero-Sequence Impedance Plots For Ground Fault On Low-Impedance Grounded Distribution System, Page 195: Figure 4.51 Z0Mta Setting Provides Forward/Reverse Ground Fault Discrimination In A Low-Impedance Grounded Distribution System, Page 198: Figure 4.52 Zero-Sequence Impedance Network For Ground Fault On Feeder 1, Page 199: Figure 4.53 Wattmetric Element Operation For Ground Fault On Feeder 1, Page 202: Table 4.26 Effect Of Settings Vsconn And Delta_Y On Petersen Coil Directional Elements, Page 204: Table 4.27 Load-Encroachment Settings, Page 205: Figure 4.54 Load-Encroachment Logic, Page 207: Figure 4.55 High-Impedance Fault Current Levels Depend On Ground Surface Type, Page 209: Figure 4.56 Hif Detection Block Diagram, Page 210: Table 4.28 High-Impedance Fault (Hif) Detection Settings, Page 212: Figure 4.57 A-Phase Second Harmonic Blocking, Page 213: Table 4.30 Second-Harmonic Blocking Settings, Page 216: Table 4.32 Rtd Resistance Versus Temperature, Page 220: Figure 4.59 Thermal Alarm And Trip Logic, Page 222: Table 4.33 Iec Thermal Element Settings, Page 223: Table 4.34 Undervoltage Function, Page 224: Table 4.35 Overvoltage Function, Page 225: Figure 4.61 Undervoltage Element Logic, Page 226: Figure 4.62 Overvoltage Element Logic, Page 227: Table 4.36 Operating Quantities For The 27I Element, Page 228: Table 4.37 Inverse-Time Undervoltage Settings, Page 229: Table 4.39 Operating Quantities For The 59I Element, Page 230: Table 4.40 Inverse-Time Overvoltage Settings, Page 231: Table 4.41 Specification Of Inverse-Time Overvoltage Protection Element, Page 232: Figure 4.67 Synchronism-Check Voltage Window And Slip Frequency Elements, Page 233: Figure 4.68 Synchronism-Check Elements, Page 234: Table 4.42 Synchronism-Check Settings, Page 238: Figure 4.69 Angle Difference Between Vp And Vs Compensated By Breaker Close Time (Fp < Fs And Vp Shown As Reference In This Example), Page 241: Table 4.43 Voltages When Setting Singlev := Y, Page 242: Figure 4.70 Three-Phase Power Elements Logic, Page 243: Table 4.45 Power Factor Settings, Page 244: Figure 4.72 Power Factor Elements Logic, Page 245: Table 4.46 Loss-Of-Potential (Lop) Setting, Page 246: Figure 4.73 Loss-Of-Potential (Lop) Logic, Page 247: Figure 4.74 Logic Diagram Of The Vector Shift Element, Page 249: Table 4.47 Vector Shift Element Settings, Page 250: Table 4.49 Rate-Of-Change-Of-Frequency Settings, Page 251: Table 4.50 Time Window Versus 81Rntp Setting, Page 252: Figure 4.77 81Rf Characteristics, Page 253: Table 4.51 Fast Rate-Of-Change-Of-Frequency Settings, Page 254: Figure 4.78 81Rf Fast Rate-Of-Change-Of-Frequency Logic, Page 255: Table 4.52 Trip/Close Logic Settings, Page 258: Figure 4.81 Reclose Supervision Logic (Following Open Interval Time-Out), Page 259: Figure 4.82 Reclose Supervision Limit Timer Operation, Page 262: Figure 4.83 Sel-751 Relays Installed At Both Ends Of A Transmission Line In A High-Speed Reclose Scheme, Page 264: Figure 4.84 Reclosing Relay States And General Operation, Page 265: Table 4.53 Relay Word Bit And Front-Panel Correspondence To Reclosing Relay States, Page 267: Table 4.54 Reclosing Control Settings, Page 268: Figure 4.85 Reclosing Sequence From Reset To Lockout With Example Settings, Page 270: Table 4.55 Shot Counter Correspondence To Relay Word Bits And Open Interval Times, Page 274: Table 4.56 Open Interval Time Example Settings, Page 277: Figure 4.87 Sequence Coordination Between The Sel-751 And A Line Recloser, Page 280: Table 4.57 Demand Meter Settings, Page 281: Figure 4.91 Response Of Thermal And Rolling Demand Meters To A Step Input (Setting Dmtc = 15 Minutes), Page 282: Figure 4.92 Voltage Vs Applied To Series Rc Circuit, Page 285: Table 4.59 Latch Bits Equation Settings, Page 290: Figure 4.96 Result Of Falling-Edge Operator On A Deasserting Input, Page 291: Table 4.62 Sel Ogic Variable Settings, Page 292: Table 4.63 Counter Input/Output Description, Page 293: Table 4.64 Order Of Precedence Of The Control Inputs, Page 294: Table 4.65 Control Output Equations And Contact Behavior Settings, Page 295: Table 4.66 General Global Settings, Page 296: Table 4.67 Event Messenger Settings, Page 297: Table 4.68 Setting Group Selection, Page 298: Table 4.70 Lea Ratio And Phase Correction Settings For Synchronism-Check Voltage, Page 300: Table 4.72 Breaker Failure Setting, Page 301: Figure 4.101 Breaker Failure Logic, Page 302: Table 4.73 Arc-Flash Overcurrent Settings, Page 303: Table 4.74 Arc-Flash Time-Overlight Settings, Page 304: Figure 4.103 Inverse Time-Overlight Element Logic, Page 305: Table 4.75 Typical Ambient Illumination Light Levels, Page 306: Figure 4.105 Analog Input Card Adaptive Name, Page 309: Table 4.77 Analog Input Card Settings In Slot, Page 310: Table 4.78 Analog Output Card Settings In Slot 3, Page 311: Figure 4.108 Analog Output Settings, Page 312: Figure 4.109 Dc Mode Processing, Page 313: Table 4.79 Slot C Input Debounce Settings, Page 314: Table 4.82 Time Synchronization Source Setting, Page 315: Table 4.84 Ethernet Port Settings, Page 316: Table 4.85 Port Number Settings That Must Be Unique, Page 317: Table 4.86 Fiber-Optic Serial Port Settings, Page 318: Table 4.88 Rear-Panel Serial Port (Eia-232/Eia-485) Settings, Page 319: Table 4.89 Rear-Panel Devicenet Port Settings, Page 320: Table 4.90 Display Point And Local Bit Default Settings, Page 322: Table 4.92 Settings That Always, Never, Or Conditionally Hide A Display Point, Page 323: Figure 4.112 Display Point Settings, Page 324: Table 4.94 Binary Entry In The Name String Only, Page 325: Table 4.95 Analog Entry In The Name String Only, Page 326: Table 4.97 Example Settings And Displays, Page 327: Figure 4.122 Adding Temperature Measurement Display Points, Page 328: Figure 4.124 Adding Two Local Bits, Page 330: Table 4.99 Pushbutton Led Settings, Page 331: Report Settings (Set R Command), Page 332: Table 4.100 Auto-Removal Settings, Page 333: Table 4.103 Set R Ser Alias Settings, Page 334: Table 4.105 Hif Event Report Settings, Page 335: Table 4.108 User Map Register Settings, Page 338: Figure 5.1 Complex Power Measurement Conventions, Page 339: Table 5.1 Measured Fundamental Meter Values, Page 342: Table 5.3 Rtd Input Status Messages, Page 343: Table 5.4 Maximum/Minimum Meter Values, Page 344: Figure 5.6 Meter M Command Response, Page 346: Figure 5.10 Meter Ai Command Response, Page 348: Table 5.7 Synchrophasor Measured Values, Page 349: Table 5.8 High-Impedance Fault Metering Measured Values, Page 351: Table 5.9 Station Dc Battery Monitor Settings, Page 352: Figure 5.17 Dc Under- And Overvoltage Elements, Page 355: Table 5.10 Breaker Maintenance Information For A 25 Kv Circuit Breaker, Page 356: Table 5.11 Breaker Monitor Settings, Page 357: Figure 5.19 Plotted Breaker Maintenance Points For A 25 Kv Circuit Breaker, Page 358: Figure 5.20 Sel-751 Breaker Maintenance Curve For A 25 Kv Circuit Breaker, Page 360: Figure 5.22 Breaker Monitor Accumulates 10 Percent Wear, Page 361: Figure 5.23 Breaker Monitor Accumulates 25 Percent Wear, Page 362: Figure 5.24 Breaker Monitor Accumulates 50 Percent Wear, Page 363: Figure 5.25 Breaker Monitor Accumulates 100 Percent Wear, Page 365: Figure 5.26 Input Inxxx Connected To Trip Bus For Breaker Monitor Initiation, Page 367: Table 6.1 Methods Of Accessing Settings, Page 368: View/Change Settings With The Two-Line Front Panel, Page 369: Figure 6.1 Front-Panel Setting Entry Example, Page 371: Table 6.4 Set Command Editing Keystrokes, Page 378: Table Set.1 Range Dependencies For The Edir Setting, Page 385: Table Set.3 Range Dependencies For 27I Operating Quantities, Page 386: Table Set.4 Range Dependencies For 59I Operating Quantities, Page 423: Table Set.5 Port Number Settings That Must Be Unique, Page 451: Table 7.1 Sel-751 Communications Port Interfaces, Page 453: Figure 7.1 Simple Ethernet Network Configuration, Page 454: Figure 7.2 Ethernet Network Configuration With Dual Redundant Connections (Failover Mode), Page 457: Figure 7.5 Irig-B Input Via Eia-232 Port 3 (Sel Communications Processor As Source), Page 458: Table 7.3 Eia-232/Eia-485 Serial Port Pin Functions, Page 459: Figure 7.10 Sel Cable C234A-Sel-751 To Dte Device, Page 460: Figure 7.12 Sel Cable C222-Sel-751 To Modem, Page 461: Table 7.4 Protocols Supported On The Various Ports, Page 465: Table 7.5 Settings Associated With Sntp, Page 467: Table 7.6 Serial Port Automatic Messages, Page 469: Table 7.7 Command Response Header Definitions, Page 472: Figure 7.16 Aft Command Response, Page 474: Figure 7.17 Breaker Monitor Report, Page 475: Figure 7.18 Breaker Wear Report, Page 476: Figure 7.20 Cev Hif Command Response, Page 479: Table 7.12 Three Remote Bit States, Page 480: Figure 7.21 Ethernet Port (Port 1) Status Report When Netmode := Prp, Page 481: Figure 7.23 Ethernet Port (Port 1) Status Report When Netmode := Failover, E61850 := Y, And Egse := Y, Page 482: Table 7.16 Event Command (Event Reports), Page 483: Table 7.18 Goose Command Variants, Page 485: Figure 7.26 Goose Command Response, Page 489: Table 7.24 Identification Command, Page 495: Figure 7.29 Ping Command Response, Page 497: Table 7.39 Ser Command (Sequential Events Recorder Report), Page 498: Table 7.41 Set Command (Change Settings), Page 499: Table 7.43 Show Command (Show/View Settings), Page 501: Table 7.44 Status Command (Relay Self-Test Status), Page 502: Figure 7.31 Typical Relay Output For Status S Command, Page 504: Table 7.49 Front-Panel Leds And The Tar 0 Command, Page 506: Table 7.51 The Command (Preload Or Reset Thermal Capacity), Page 507: Table 7.53 Trigger Command (Trigger Event Report), Page 508: Table 7.56 Ftp And Mms Virtual File Structure, Page 510: Table 7.57 Settings Directory Files, Page 511: Table 7.59 Event Directory Files, Page 512: Table 7.60 Files Available For Ymodem Protocol, Page 513: Table 7.61 Ftp And Mms Wildcard Usage Examples, Page 515: Figure 8.1 Sel-751 Front-Panel Models, Page 516: Figure 8.2 Front-Panel Overview, Page 517: Table 8.1 Front-Panel Automatic Messages (Fp_Auto := Override), Page 518: Figure 8.3 Access Level Security Padlock Symbol, Page 519: Table 8.2 Front-Panel Pushbutton Functions, Page 521: Figure 8.9 Relay Response When Energy (Or Max/Min, Demand, Peak Demand) Metering Is Reset, Page 522: Figure 8.13 Events Menu And Display Submenu, Page 523: Figure 8.17 Targets Menu Navigation, Page 524: Figure 8.19 Control Menu And Outputs Submenu, Page 525: Figure 8.21 Main Menu And Set/Show Submenu, Page 527: Figure 8.24 Main Menu And Breaker Submenu, Page 528: Table 8.3 Possible Warning Conditions (Flashing Trip Led), Page 529: Figure 8.26 Target Reset Pushbutton, Page 530: Table 8.4 Sel-751 Front-Panel Operator Control Functions, Page 532: Figure 8.28 Touchscreen Display Components And Indicators, Page 533: Table 8.5 Touchscreen Display Component And Indicator Descriptions, Page 534: Table 8.6 Front-Panel Automatic Messages, Page 536: Table 8.8 Home Folders And Applications, Page 537: Table 8.9 Meter Application Availability, Page 539: Table 8.10 Monitor Application Availability, Page 540: Table 8.11 Reports Application Availability, Page 541: Figure 8.44 Sequential Events Recorder, Page 542: Table 8.12 Control Application Availability, Page 544: Table 8.13 Device Info Application Availability, Page 545: Figure 8.56 Trip And Diagnostic Messages, Page 546: Table 8.14 Access Level Application Availability, Page 547: Table 8.15 Settings Folder And Application Availability, Page 549: Figure 8.68 Touchscreen Settings, Page 560: Table 9.1 Circuit Breaker Symbols, Page 562: Table 9.4 Local/Remote Breaker Control Settings, Page 563: Figure 9.3 Bay Screens Application Display With A Single-Line Diagram, Page 564: Figure 9.5 Quickset Front-Panel Options, Page 568: Figure 9.7 Layout Of Bay Screen Builder, Page 570: Figure 9.8 Project Analysis Pane: Analysis Results Tab, Page 571: Figure 9.10 Bay Control Single-Line Diagram Schematic, Page 572: Figure 9.11 Device Part Number Touchscreen Configuration Option, Page 573: Figure 9.13 Open Single-Line Diagram In Bay Screen Builder, Page 574: Table 9.6 Symbols Required For The Single-Line Diagram Schematic In Figure, Page 575: Figure 9.15 Selected Breaker Symbol Settings Displayed In The Properties Pane, Page 576: Figure 9.17 Publish Bay Screen Builder Project To Quickset, Page 580: Figure 9.19 Final Bay Screen Builder Rendering, Page 581: Figure 9.20 Import/Export Of The Bay Control Screen In Quickset, Page 582: Figure 9.22 Tie Breaker Bay Control Single-Line Diagram, Page 585: Figure 10.1 Example Event Summary, Page 587: Table 10.2 Phase Involvement Event Type, Page 590: Figure 10.2 Sample Event History, Page 591: Table 10.3 Event Report Current And Voltage Columns, Page 592: Table 10.4 Output, Input, Protection, And Control Element Event Report Columns, Page 594: Figure 10.3 Example Standard 15-Cycle Event Report 1/4-Cycle Resolution, Page 599: Figure 10.4 Derivation Of Event Report Current Values And Rms Current Values From Sampled Current Waveform, Page 600: Figure 10.5 Derivation Of Phasor Rms Current Values From Event Report Current Values, Page 601: Figure 10.6 Sample Compressed Ascii Event Report, Page 605: Figure 10.7 Sample Cev Report Viewed With Analytic Assistant Or, Page 606: Figure 10.8 Options For Converting Cev Reports To Comtrade In Analytic Assistant, Page 607: Figure 10.9 Sample Comtrade .Hdr Header File, Page 610: Figure 10.10 Sample Comtrade .Cfg Configuration File Data, Page 611: High-Impedance Fault (Hif) Event Reporting, Page 614: Table 10.8 Hif Downed Conductor, Page 615: Figure 10.12 Sample Compressed Ascii Hif Summary, Page 617: Figure 10.15 Sample Hif Comtrade .Hdr Header File, Page 619: Figure 10.17 Example Sequential Events Recorder (Ser) Event Report, Page 622: Table 11.1 Resultant Scale Factors For Inputs, Page 625: Figure 11.2 Three-Phase Wye Ac Connections, Page 626: Table 11.2 Serial Port Commands That Clear Relay Data Buffers, Page 627: Table 11.3 Phase Current Measuring Accuracy, Page 628: Table 11.4 Current Unbalance Measuring Accuracy, Page 629: Table 11.5 Power Quantity Accuracy-Wye Voltages, Page 630: Table 11.6 Power Quantity Accuracy-Delta Voltages, Page 632: Table 11.7 Periodic Relay Checks, Page 639: Table A.1 R200 Series Firmware Revision History, Page 641: Table A.2 R100 Series Firmware Revision History, Page 645: Table A.3 Sel Display Package Revision History, Page 646: Table A.5 Devicenet Card Versions, Page 647: Table A.7 Sel-751 Icd File Revision History, Page 651: Table A.8 Instruction Manual Revision History, Page 662: Upgrade Firmware Using Quickset, Page 666: Upgrade Firmware Using A Terminal Emulator, Page 667: Figure B.1 Firmware File Transfer Process, Page 668: Protocol Verification For Relays With Iec 61850 Option, Page 671: Table C.1 Supported Serial Command Sets, Page 672: Table C.2 Compressed Ascii Commands, Page 673: Figure C.1 Sel Communications Processor Star Integration Network, Page 674: Table C.3 Sel Communications Processors Protocol Interfaces, Page 675: Sel Communications Processor And Relay Architecture, Page 676: Figure C.3 Enhancing Multidrop Networks With Sel Communications Processors, Page 677: Table C.4 Sel Communications Processor Port 1 Settings, Page 678: Table C.6 Sel Communications Processor Port 1 Automatic Messaging Settings, Page 679: Table C.9 Communications Processor Target Region, Page 681: Table C.10 Communications Processor Demand Region Map, Page 682: Figure C.5 Unsolicited Write Settings, Page 684: Figure C.6 Setting Remote Analogs Ra01 Through Ra13, Page 685: Table D.1 Dnp3 Implementation Levels, Page 687: Table D.2 Selected Dnp3 Function Codes, Page 690: Table D.4 Tcp/Udp Selection Guidelines, Page 691: Figure D.1 Application Confirmation Timing With Uretry N = 2, Page 692: Figure D.2 Message Transmission Timing, Page 693: Table D.6 Sel-751 Event Buffer Capacity, Page 695: Table D.7 Port Dnp3 Protocol Settings, Page 696: Table D.8 Serial Port Dnp3 Modem Settings, Page 698: Table D.9 Sel-751 Dnp Object List, Page 703: Table D.10 Dnp3 Reference Data Map, Page 704: Table D.11 Dnp3 Default Data Map, Page 707: Table D.12 Sel-751 Object 12 Control Operations, Page 708: Figure D.3 Sample Response To Sho Dnp Command, Page 711: Table D.13 Sample Custom Dnp3 Ai Map, Page 712: Figure D.7 Ai Point Label, Scaling And Deadband In, Page 713: Figure D.8 Sample Custom Dnp3 Ao Map Settings, Page 714: Figure D.10 Sample Custom Dnp3 Bo Map Settings, Page 717: Table E.3 Sel-751 Modbus Exception Codes, Page 718: Table E.4 01H Read Discrete Output Coil Status Command, Page 720: Table E.8 Responses To 02H Read Input Query Errors, Page 721: Table E.11 04H Read Input Register Command, Page 722: Table E.14 01H, 05H Sel-751 Output, Page 724: Table E.15 Responses To 05H Force Single Coil Query Errors, Page 725: Table E.17 Responses To 06H Preset Single Register Query Errors, Page 726: Table E.20 10H Preset Multiple Registers Command, Page 727: Table E.23 60H Read Parameter Descriptor Field Definition, Page 728: Table E.25 Responses To 60H Read Parameter Information Query Errors, Page 729: Table E.27 61H Read Parameter Text Query Error Messages, Page 730: Table E.31 7Dh Encapsulated Packet Query Errors, Page 732: Table E.33 Modbus Register Labels For Use With Set M Command, Page 778: Table F.1 Iec 61850 Document Set, Page 780: Table F.2 Example Iec 61850 Descriptor Components, Page 783: Figure F.2 Sel-751 Predefined Reports, Page 784: Table F.4 Buffered Report Control Block Client Access, Page 789: Table F.7 New Logical Node Extensions, Page 790: Table F.10 Thermal Element Metering Data Logical Node Class Definition, Page 791: Table F.11 Metering Statistics Logical Node Class Definition, Page 792: Table F.13 Compatible Logical Nodes With Extensions, Page 793: Table F.15 Circuit Breaker Logical Node Class Definition, Page 794: Table F.17 Measurement Logical Node Class Definition, Page 795: Table F.20 Logical Device: Pro (Protection), Page 807: Table F.21 Logical Device: Met (Metering), Page 811: Table F.22 Logical Device: Con (Remote Control), Page 812: Table F.23 Logical Device: Ann (Annunciation), Page 818: Table F.24 Logical Device: Cfg (Configuration), Page 819: Table F.27 Mms Service Supported Conformance, Page 822: Table F.30 Variableaccessspecification Conformance Statement, Page 823: Table F.35 Getnamedvariablelistattributes Conformance Statement, Page 824: Table F.38 Acsi Basic Conformance Statement, Page 825: Table F.40 Acsi Services Conformance Statement, Page 829: Table G.1 Iec 60870-5 Standard Documents, Page 830: Table G.2 Iec 60870-5 Enhanced Performance Architecture Model, Page 832: Table G.5 Iec 60870-5-103 Category Map Settings, Page 833: Table G.6 Iec 60870-5-103 Cause Of Transmission, Page 834: Table G.8 Iec 60870-5-103 Standard Function Types, Page 837: Table G.10 Sel-751 Iec 60870-5-103 Port Settings, Page 838: Table G.11 Sel-751 Analog Fault Quantities, Page 841: Figure H.1 Devicenet Card Component Overview, Page 847: Figure I.2 Waveform At Relay Terminals May Have A Phase Shift, Page 848: Table I.1 Pmu Settings In The Sel-751 For C37.118 Protocol In Global Settings, Page 850: Table I.2 Synchrophasor Order In Data Stream (Voltages And Currents), Page 851: Table I.3 User-Defined Analog Values Selected By The Numana Setting, Page 852: Table I.5 Sel-751 Serial Port Settings For Synchrophasors, Page 853: Table I.6 Sel-751 Ethernet Port Settings For Synchrophasors, Page 855: Table I.7 Synchrophasor Trigger Relay Word Bits, Page 856: Table I.9 Tqual Bits Translation To Time Quality, Page 857: View Synchrophasors Using The Met Pm Command, Page 858: Figure I.7 Sample Met Pm Command Response, Page 859: Table I.10 Size Of A C37.118 Synchrophasor Message, Page 860: Ieee C37.118 Pmu Setting Example, Page 862: Table I.12 Example Synchrophasor Global Settings, Page 866: Table J.1 Number Of Mirrored Bits Messages For Different Data Rates, Page 867: Table J.2 Positions Of The Mirrored Bits, Page 869: Table J.4 Mirrored Bits Communications Message Transmission Period, Page 871: Table K.1 Sel Ogic Relay Word Bits, Page 876: Table K.2 Relay Word Bit Definitions For The Sel-751 Relay.

Faire Un Plan De Coupe, Notre-dame De Paris Que C'est-il Passé, Plu Paris Ppri, Logo Psg 2020, Signes Présence Termites, Cheese Board Background, Award Images Png, Imagine R Contact, Collage Photo Psd, Jeu à 5 Euros, Wyld La Mort Ou La Gloire Epub Gratuit,